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FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
chain of bit selects through all of the LED driver ICs in a
system (10 x N bits. N = # of LED Driver IC).
RESET_SCAN is taken high at the start of each frame to
reset the internal counter. Following the STH pulsing the
input to the 10-bit register, the Controller is set to 1, which
ripples through the connected shift registers with each data
write. Once 10-bit data for this LED Driver has been written,
the DIO1 (or DIO2) pin is taken high. This latches the data in
the Sample and Hold (S/H) of the corresponding PWM
channel (selected by SIC counter) for this LED Driver device.
The DIO1 (or DIO2) pulsing from this LED Driver is input to
the next LED Driver, as its STH signal at DIO2 (or DIO1) pin.
Then the next 10-bit data can be written to the S/H of the
selected PWM channel for this LED Driver device. This
process continues until all the 10-bit data is written to the S/
Hs in all LED Driver ICs, respectively. When LS is pulsed, the
10-bit PWM data is transferred from S/H to the PWM
controller to start the PWM for LED driver, and the SIC
counter increases by 1 in each LED Driver device.
For multiple devices, another 10 x N bits are then written
for the next selected PWM channels in each LED Drivers
using the same procedure. This continues and repeats for the
N = 8 PWM channels in each LED Driver device.
The direction of the internal shift register is set using the
SHL input. The DIO1 and DIO2 pins are used as inputs and
output to the shift register depending on the status of SHL.
The differential interface control also features a default
configuration mode for device setup. This is enabled by
taking the SETUPD pin high.
S/H
(001)
10
CH1 PWM
CONTROL
PWM_CLK
CH1
32 BIT CONFIGURATION
REGISTER
S/H
(010)
10
CH2 PWM
CONTROL
PWM_CLK
CH2
DATA+
DATA-
AGND
32
10
S/H
(011)
S/H
(100)
S/H
(101)
S/H
(110)
10
10
10
10
CH3 PWM
CONTROL
PWM_CLK
CH4 PWM
CONTROL
PWM_CLK
CH5 PWM
CONTROL
PWM_CLK
CH6 PWM
CONTROL
PWM_CLK
CH3
CH4
CH5
CH6
S/H
(111)
10
CH7 PWM
CONTROL
PWM_CLK
CH7
CLK+
S/H
(000)
10
CH8 PWM
CONTROL
PWM_CLK
CH8
CLK-
SHIFT REGISTER
3
OUT INTERNAL PWM
SETUPD
STH
INTERNAL
COUNTER
REF OSCILLATOR
DIO1 SHL
DIO2
RESETSCAN SETUP
LS
SCAN
PLLC
SYNC_PWM
Figure 13. Control Register Block Diagram
34848
Analog Integrated Circuit Device Data
Freescale Semiconductor
17
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